Performance and off-state current mechanisms of low-temperature processed polysilicon thin-film transistors with liquid phase deposited SiO/sub 2/ gate insulator

Polysilicon thin-film transistors (poly-Si TFT's) with liquid phase deposition (LPD) silicon dioxide (SiO/sub 2/) gate insulator were realized by low-temperature processes (<620/spl deg/C). The physical, chemical, and electrical properties of the new dielectric layer were clarified. The low-temperature processed (LTP) poly-Si TFT's with W/L=200 /spl mu/m/10 /spl mu/m had an on-off current ratio of 4.95/spl times/10/sup 6/ at V/sub D/=5 V, a field effect mobility of 25.5 cm/sup 2//V/spl middot/s at V/sub D/=0.1 V, a threshold voltage of 6.9 V, and a subthreshold swing of 1.28 V/decade at V/sub D/=0.1 V. Effective passivation of defects by plasma hydrogenation can improve the characteristics of the devices. The off-state current (I/sub L/) mechanisms of the LTP poly-Si TFT's were systematically compared and clarified. The I/sub L/ is divided into three regions; the I/sub L/ is attributable to a resistive current in region I (low gate bias), to pure thermal generation current in region II (low drain bias), and to Frenkel-Poole emission current in region III (high gate bias and drain bias).<
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