High speed low connectivity (HSLC) counter (using cellular automata concept)

A new type of nonbinary counter that represents one step toward overcoming the shortcomings of circuit complexity and interconnection delays is introduced. The counter is known as a high speed low connectivity (HSLC) counter. Its architecture employs a cellular logic design concept with judiciously chosen local logical rules for interconnecting its building modules. The realizability of such counters is thoroughly investigated with emphasis on construction rules to achieve the maximum count cycle.<
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