VIRGO: hierarchical DSP code generator based on vectorized signal flow graph description

A hierarchical digital signal processor (DSP) code generator, VIRGO, for large-scale general signal processing algorithms is proposed. Hierarchical structured vectorized signal flow graph (V-SFG) description is used as input specification. The DSP independent optimization procedure for both the program size and the execution time is performed, module by module, hierarchically with regard to operation order, memory assignment, and register allocation. Efficient code generation is demonstrated by comparing both instruction steps and dynamic steps of a practical adaptive differential pulse-code modulation (ADPCM) encoder/decoder with a conventional method.<
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