Comprehensive structural testing of ASIC macrocells, a comparative analysis

A comparative analysis of three test generation methods for designs based on CMOS ASIC macrocells is presented. These methods are (1) stuck-at tests, (2) IDDQ tests; and (3) crosscheck tests. The fault modeling technique for each method is described. The test generated by using the fault model of each method is used to compare the completeness of the methods in terms of actual defect coverage. Conclusions are derived for each method according to its effectiveness for achieving desired quality levels.<
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