Methodology of detection of spurious signals in VLSI circuits

The continuous reduction in scale achieved in microelectronic technology and the increasing switching speed may cause parasitic or spurious signals to appear, due to crosstalk. In this work, scale reduction of interconnections is analyzed, showing the increasing mutual capacitance and a model of crosstalk considering parasitic capacitive coupling is shown. A method for studying the propagation of crosstalk signals has been developed for combinational circuits. An algorithm for crosstalk faults test pattern generation is proposed taking into account the propagation limitation of the signals. Experimental results are shown.<
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