FPGA implementation of the BH8000 wormhole router

A Xilinx FPGA was chosen for prototyping a self-timed message routing device. The authors' experience in implementing an asynchronous design on an FPGA, which like most other programmable logic is optimised for synchronous designs, is described. The manual intervention needed at various stages of design implementation is discussed. Debugging and performance issues are looked at and some modifications to the FPGA architecture are suggested.<
>