Finite state machine optimization algorithms for pipelined data path controllers

Algorithms for generating an optimal finite state machine (FSM) implementation of pipelined data path controllers are presented. The groups of states are partitioned into two, states are encoded, and each partition is mapped onto one PLA to form a two-PLA based Moore-style FSM state sequencer. The experimental results show that substantial savings in layout area can be achieved compared to published traditional FSM optimization approaches.<
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