Dislocation free gate process using in situ doped polysilicon thin films by crystallization-induced stress of the films

In situ doped polysilicon thin films have been found useful for half-micron technology because the film deposition process is simple and the film surface is rather flat. The characteristics of the film are evaluated experimentally to apply it to a gate electrode material. It is confirmed that the film has much better tolerance to HF penetration than the conventional POCl/sub 3/-treated polysilicon thin film, and has good surface flatness. However, abnormal leakage current is observed in MOSFETs using the in situ doped polysilicon gate, while the leakage current of the MOSFETs using the conventional POCl/sub 3/ treated polysilicon gate is low and stable. The abnormal leakage current is found to be caused by dislocations in the silicon substrate at the gate edges. The films must be annealed fully to eliminate dislocations at the gate edges, which results in a low and stable leakage current level of MOSFETs.