Architectures for analog VLSI implementation of neural networks for solving linear equations with inequality constraints

A novel algorithm for solving generalized systems of linear equations subject to linear inequalities is proposed. The algorithm is robust with respect to wild (spiky) noise and outliers. The algorithm is expressed completely in differential equations. An OTA (operational transconductance amplifier)-based implementation of the algorithm as an analog VLSI circuit in CMOS technology is discussed. One of the many possible applications of the proposed techniques is the implementation of cellular neural networks with real-time on-chip learning capabilities.<
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