Dream chip 1: a timed priority queue

Real-time programs often need a time-tagged priority queue that must be updated on the tick of a clock. A prime example of such a queue is a list of filter coefficients that must be changed on a given sample clock. A single chip that manages a time-tagged priority queue is proposed. The queue connects either to a static random access memory (SRAM) or directly to a digital signal processor (DSP) microprocessor. The SRAM would be part of the address space of a DSP microprocessor executing digital filter code.<
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