A design exercise of a micropower analog digital ASIC chip

A micropower heart rate detector chip integrated with CMOS technology has been developed. The chip uses analog SC and digital techniques. A mathematics program was used for system level optimization and analysis, whereas in circuit level verification a mixed mode and transistor level simulators were used. The layout was done in full custom style in order to minimize silicon area. This paper gives a general description of the application together with discussion about the actual design and some practical experiences encountered during the design project.<
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