A high-quality stacked thermal/LPCVD gate oxide technology for ULSI

By stacking thermal and high-quality LPCVD (low-pressure chemical vapor deposition) SiO/sub 2/ films, gate oxides with very low defect densities are demonstrated. Whereas previous reports suggested that a thick layer of LPCVD oxide can improve the stacked gate oxide defect density, it is demonstrated that even 25 AA of LPCVD oxide is sufficient to dramatically reduce the defect density compared to thermal oxide films. The projected scaling limit for this technology is estimated to be as low as 70 AA for the total stack thickness. An optimized thermal/LPCVD oxide technology is very promising as the gate dielectric for sub-half-micrometer CMOS technology.<
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