Metastability of CMOS master/slave flip-flops

Presents circuit techniques to improve the mean time between failures (MTBF) of a latch due to metastable events. The complete approach includes a unique design of the latch and the formation of series connected master/slave (M/S) flip-flops using this latch. An equation is developed to predict the MTBF due to metastability of a single latch and is extended to include single and multiple series connected M/S flip-flops. The equation predicts that the MTBF increases significantly by using such a M/S flip-flop configuration.<
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