Determination of trapped oxide charge in flash EPROMs and MOSFETs with thin oxides

A technique for determining the sign and the effective density of the trapped oxide charge near the junction transition region, based on the measurement of the gate-induced drain leakage (GIDL) current, is used to investigate the hot-carrier effects resulting from the erase operation and bit-line stress in flash EPROM devices. While the trapped oxide charge depends on the stress conditions, it has been found that a significant amount of hole trapping is likely when a sufficiently large potential difference exists between the gate and junction for either an abrupt or graded junction.<
>