Testability features in a high-density memory module

A configurable multichip memory module designed in silicon-on-silicon hybrid form is discussed. The memory controller IC, which has been implemented in a CMOS gate array, also functions as an in-circuit tester for the memory chips. This capability, supplemented by the controller's own scan-path and boundary-scan features, results in increased in-field testability as well as greatly reduced production test costs.<
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