Test structures for analysis and parameter extraction of secondary photon-induced leakage currents in CMOS DRAM technology

A photon-induced leakage current technique to analyze hot carriers is discussed. CMOS photo-leakage test structures were used to determine the spatial dependency of photon-induced leakage current. New trench dynamic RAM (DRAM) test structures were developed for application of the photon-induced leakage technique to analyze hot carriers induced by trench DRAM leakage mechanisms. An analytical model is developed for application of the photon-induced leakage analysis to MOSFET and trench gate-induced diode leakage mechanisms.<
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