A set of four ICs in CMOS technology for a programmable hearing aid

A four-chip system developed for a programmable hearing aid is presented. It combines E/sup 2/PROM (electrically erasable programmable read-only memory) memories with a control logic, low-noise preamplifiers, AGC (automatic gain control) amplifiers, SC (switched-capacitor) filters, voltage multipliers, and an output amplifier of the pulse-width type. The implementation of the critical parts is explained. The 3- mu m self-aligned-contacts MOS technology of the Faselec company is used. The system is supplied by a single 1.3-V battery and its typical current consumption is 1.5 mA. The whole system can be connected to a computer.<
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