Hardware realization of a 2D IIR semisystolic filter with application to real-time homomorphic filtering

Hardware design and implementation of a 2D sample-and-hold semisystolic filter structure are presented. Log and antilog circuits are used with a high-frequency-emphasis IIR filter to provide homomorphic filtering. SPICE simulation using functional blocks as well as particulars on the hardware design with reference to specific device types and characteristics are discussed. A hardware prototype circuit using MSI and LSI circuits on a custom-made PCB is shown along with applications to real-time filtering of broadcasted TV images.<
>