A refreshable analog VLSI neural network chip with 400 neurons and 40 K synapses

An on-chip learning neural network LSI circuit that can refresh the analog storage synaptic weights located on a chip is described. The chip integrates 400 neurons and 40000 synapses with a 0.8- mu m double-poly double-metal CMOS technology. This device stores learned information by repeating the refresh process at 200-ms intervals.<
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