A novel distributed interleaving scheme to achieve scalable phase design for microprocessor power management

This paper introduces a novel distributed interleaving scheme for the multi-phase dc-dc converter used for microprocessor power management. The proposed scheme can easily achieve scalable phase interleaving without channel number limitation. Each channel's interleaving circuitry can be monolithically integrated without any external component. This scheme is verified by a 1MHz discrete hardware. A silicon test chip that integrates the proposed distributed interleaving cell was also developed. The testing result further verified the features of the proposed scheme and circuit. The new interleaving solution can also be used in any other cellular converter system.