A 10Gb/s burst-mode adaptive gain select limiting amplifier in 0.13/spl mu/m CMOS

A 10Gb/s burst-mode limiting amplifier is developed in a 0.13μ m CMOS process. An adaptive gain-selection technique achieves a settling time of 0.8ns and a wide input dynamic range of 28dB, which is five-times wider than that of previous work at 10Gb/s