Heuristic Synthesis of Microprogrammed Computer Architecture

This paper describes an algorithm for the synthesis of applications-oriented microcode for a dynamically microprogrammable computer. The synthesis algorithm provides an iterative method for generating specialized architectures. Current attempts at generating specialized architectures can be considered as manual tuning due to human generation of specialized microcode. Heuristic instruction synthesis is described as one phase of a heuristic tuning process which attempts to automate the manual tuning process.