Demonstration of short-channel self-aligned Pt/sub 2/Si-FUSI pMOSFETs with low threshold voltage (-0.29 V) on SiON and HfSiON

Short gate-length Pt full-silicidation (FUSI) (PtSi and Pt/sub 2/Si) pMOSFETs were fabricated for the first time using a self-aligned Pt-FUSI process, demonstrating scalability (with no linewidth effects) down to /spl sim/ 60-nm gate lengths. The electrical results are compared to the Ni-FUSI (NiSi and Ni/sub 31/Si/sub 12/) pMOSFET devices. A low threshold voltage /spl les/|-0.29 V| was obtained for the Pt/sub 2/Si-FUSI pMOSFETs on SiON and HfSiON indicating that the Pt/sub 2/Si FUSI does not suffer from the Fermi-level pinning or gate-dielectric-charge effects on the HfSiON.