Low power pipelined radix-2 FFT processor for speech recognition

It is important to develop a high-performance FFT/IFFT processor to meet the requirements of real-time, low area (low cast), and low power in different applications. In this paper, we proposed a radix-2 pipeline FFT processor for Mel frequency cepstral coefficient (MFCC). This novel architecture can reduce more power consumption. This approach is very attractive for MFCC speech feature extraction.