31-34GHz low noise amplifier with on-chip microstrip lines and inter-stage matching in 90-nm baseline CMOS

A Ka band low-noise amplifier in a 90-nm bulk CMOS technology is presented. A thin-film microstrip line with ground sidewalls is used for signal distribution, matching and load resonators. The low-noise amplifier comprises two identical cascode stages, with inter-stage matching as gain boosting. The gain boosting circuit improves the gain by 20% and the noise performance by 27% of the cascode LNA. The proposed amplifier achieves a peak power-gain of 19dB with a 3-dB bandwidth of 31 to 34GHz and a noise figure of 3dB in the middle of the band. No extra process options like MIM capacitors or thick oxide devices are used. The die size is 933 /spl mu/m by 918 /spl mu/m and the power consumption is 10mW from a 1.2V (/spl plusmn/10%) power supply.