CMOS compatible integration of three-dimensional microfluidic systems based on low-temperature transfer of SU-8 films

A novel approach to integrate densely packed CMOS devices with three-dimensional (3-D) microfluidic systems created at the wafer level using low temperature processes is introduced. The approach is based on low temperature (<50/spl deg/C) bonding and releasing of non-UV-exposed SU-8 films onto a SU-8 structured Si wafer bearing CMOS devices and multilayered lithography in the non-UV-exposed SU-8 films to form 3-D microfluidic structures. The fabrication process assures compatibility with CMOS electronics and has the advantage in realizing complex microfluidic systems comparable in size to CMOS devices, hence holding great promise for large-scale integration between the two. We demonstrate in this paper the integration of more than 800 3-D microchannel systems with giant magnetoresistive (GMR) sensors prefabricated on a 4'' Si wafer.