Influence of device parameters on the switching speed of BiCMOS buffers

The influence of different MOS and bipolar device parameters on the switching speed of a BiCMOS buffer is described. This influence is studied by looking at the response of a BiCMOS inverter to a step input. Using suitable approximations for the high-level injection effects in the bipolar transistor, mathematical approximations for the response are derived. The approximate responses are compared to those determined by SPICE simulations and the agreement is satisfactory. High-current effects in the bipolar transistor strongly affect the performance. The effects of different bipolar transistor parasitic resistors are investigated, and it is found that only the collector resistance is important. The influence of different emitter sizes on the delay time is studied, and it is shown that for a given area, there is one optimal size ratio for the MOS and bipolar transistors for which the delay is minimum.<
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