The design and analysis of a high performance embedded external memory interface

This paper introduces several important methods to design the embedded external memory interface (EMIF) for a high performance DSP (digital signal processor). Starting with the design specification of the EMIF, this paper introduces four important new design methods, i.e. width-scalable accessing, data buffers based on asynchronous FIFOs, token cycle method for priority arbitration, and preferential reading based on cache-line offset, and give simulation and tape out result. At the end of the paper, we analyze the performance improvements by use of these methods vs. classical methods. The whole design of the interface is proven to be not only functional and reliable, but also programmable, reusable and scalable by simulation verification and tape out.