CMOS low noise amplifier design techniques using shunt resistive feedback

This paper introduces the design principles of CMOS low noise amplifiers using shunt resistive feedback. Based on the proposed approach, noise of LNA is analyzed and verified via simulator according to the feedback resistance. A tested fully differential low noise amplifier using this feedback topology shows 12.4dB power gain, 4.2dB noise figure, 5.0dBm output P1dB and 5.6dBm OIP3 at 915MHz unlicensed ISM band frequency using standard 0.25-/spl mu/m CMOS process, while consuming 6.2mA current at supply voltage of 2.5V.