3.125Gbit/s low power truly-differential parallel optical receiver module in 0.13 /spl mu/m CMOS

High-speed, low-cost parallel optical receiver modules are needed in optically interconnected digital systems. High performance receiver designs become more challenging with the CMOS technology and supply voltage scaling down. In this work, we designed a 3.125Gbit/s, multi-channel, single 1.2 V core supply optical receiver module in a 0.13 /spl mu/m triple-well CMOS process. The minimum power consumption including the post amplifier and the output buffer is 22.62mW per channel with a sensitivity of -16dBm. A method of using on-chip pseudo random bit sequence (PRBS) generator and dummy receiver channels to test the cross-talk performance was implemented. And also we present an accurate experimental method to characterize a photodiode array.