Best structures for deep submicrometer (0.1-0.3 mu m) MOS devices

The LDD-type structure has begun to encounter difficulties in satisfying transistor requirements in manufacturing due to a basic conflict between the need to have a graded drain profile for hot carrier suppression and the requirements for manufacturability and performance which place emphasis on a shallow, steeply profiled drain. One approach for overcoming this conflict and limitation is a MOS transistor structure called the hot-carrier suppressed (HCS) MOSFET. In this approach, a lower doped drain region is placed behind, or above, the shallow, heavier doped drain region rather than being placed adjacent to the channel region. This structure is described in detail, and its simulated performance compared with that of the LDD and conventional MOSFET structures.