Hardware implementation for face detection on Xilinx Virtex-II FPGA using the reversible component transformation colour space

Face detection is the process of locating the position where faces are present in an image. Not all proposed face detection methods are suitable for direct hardware implementation. This paper explains a method that utilises the reversible component transformation (RCT) colour space and outlines its transition from a software- to hardware-based implementation. The hardware performance and efficiency of the RCT algorithm is examined using the Xilinx Virtex-II field programmable gate arrays (FPGA). Results show that there is almost negligible difference in performance after transition to hardware and its implementation on FPGA requires 255,416 NAND gates, which is only slightly more than twice the number of NAND gates of a basic video-in application.