Design of a CMOS floating-gate resistor for highly linear amplifier and multiplier applications

We present implementations of highly linear amplifier and multiplier circuits that employ a linear CMOS resistor. This tunable resistor is built by utilizing the common-mode linearization technique, and by exploiting the gate-coupling and charge-storage characteristics of the floating-gate transistors. It exhibits 0.01% THD for 1V
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input. Also, the amplifier has an input linear range of 2.5V
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for differential and single-ended inputs, and achieves 0.018% THD for 1V
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differential input