Through wafer via technology for 3-D packaging

Through wafer via fabrication has been one of the key technologies for 3-D packaging and microsystem packaging. Four different through wafer via fabrication technologies and applications are reviewed, such as laser drilling, deep reactive ion etching (DRIE), photo assisted electro chemical etching (PAECE) and KOH etching. Especially, KOH etching is widely used in bulk micromachining of microelectromechanical system (MEMS) fabrication and featured with anisotropic etching of silicon. Through wafer via technology based on double-sided KOH etching is presented, which needs double-sided alignment exposure. A SiO/sub 2/ layer is deposited by PECVD for insulation layer and then TiW/Cu sputtering and Cu electroplating are used to deposit conductive layers. In order to reroute the metal layer of silicon wafer with vias, photosensitive dry film and liquid photoresist exposure are tested.