Device performance improvement of InGaP/InGaAs doped-channel FETs

Partial drain/source ohmic recess InGaP/InGaAs/GaAs doped-channel field-effect transistors (OR-DCFETs) are proposed and fabricated in this study. The proposed ohmic recess process reduces the parasitic ohmic alloyed resistance caused by the undoped Schottky layer and therefore improves the device performance in terms of dc and source resistance, as well as RF characteristics. We compare the proposed devices with the DCFETs using the conventional process by means of experiments, where the Yang-Long method is used to analyze the effect of parasitic source resistances.