Fast Fourier transform using linear tagged systolic array

A systematic methodology for design of systolic arrays from a set of nonlinear and nonuniform recurrence equations is discussed. A novel architectural idea, which is name tagged systolic array, is introduced. A tagged systolic array uses tags for data routing among processing elements. The design methodology described broadens the class of algorithms amenable for tagged systolic array implementation. The design methodology is illustrated by deriving a tagged systolic array for the fast Fourier transform.<
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