200-mm wafer-scale transfer of 0.18-μm dual-damascene Cu/SiO2 interconnection system to plastic substrates

We report a low-temperature (<200/spl deg/C) 200-mm wafer-scale transfer of a 0.18-μm dual-damascene Cu/SiO
₂
interconnection system to FR-4 plastic substrates using adhesive bonding. We demonstrate removal of the silicon bulk layer to leave behind a flexible 3-μm-thick Si back-end-of-line (BEOL) circuit on a 0.1-mm-thick FR-4 wafer. The mechanical and electrical integrity of the thin Si BEOL circuit on FR-4 are confirmed by focused ion beam scanning electron microscope microscopy and current-voltage characterization on a variety of test structures, which include serpentine, via chain and Kelvin test structures on different locations on the wafer. This process will pave the path to allow integration of high-performance submicrometer Si electronics on plastic substrates.