Layout effects on design optimization of CMOS LNA and mixer

A study on the comparison of different layout methods on the performance of RF CMOS integrated circuits is presented in this paper. Multi-finger and compact waffle layout strategies are investigated in detail. Vital layout parameters, including unit cell configuration and the conflict between finger length and the number of fingers, are analyzed in view of the noise figure and gate RC delay. Layout effects on CMOS LNA and mixer are verified through circuit simulation and fabrication using a 0.35/spl mu/m standard CMOS process.