Low noise CMOS mixers

This paper presents two new mixer circuits, designed by implementing the noise cancellation technique (NCT) (Bruccoleri et al., 2001) for a CMOS transistor (MOST) on single balanced mixer architecture. The single side band (SSB) noise figure performance of the proposed down conversion mixer architectures can be as low as 3.6dB@280MHz IF, if coils are used. The conversion gain of such NCT mixer is higher than 7dB, the IP3 is -5dBm and its power consumption is smaller than 13mW at 1.8V voltage supply.