Senior-level embedded system design project using FPGAs

There is a growing need to provide students with meaningful system-level design (SLD) experiences at the undergraduate level. Relevant SLD skills include the ability to integrate IP from third-party providers, create reusable IP (including appropriate documentation), partition system functionality between software and hardware, and properly integrate real-time functions within an operating system. A senior SLD project was created to provide such an experience for undergraduate students. With cooperation from Xilinx corporation, this single semester course provides students the opportunity to learn SLD skills by creating a single-chip multimedia computer system using FPGAs. Students in this class integrate custom IP and third-party IP into a PowerPC-based system within a single FPGA device. The final product is a real-time multimedia computer system providing both audio and video services. This paper describes the SLD course, beginning by outlining its goals and requirements. Next, the hardware and software infrastructure used by the project is described. Finally, the class schedule is reviewed.