FPGA-based vector processing for solving sparse sets of equations

The solution to a set of sparse linear equations Ax=b, where A is an n/spl times/n sparse matrix and b is an n-element vector, can be obtained using the W-matrix method. An enhanced vector processor is implemented on an FPGA for this problem. Performance results are presented. The effect of pipelined multiple functional units, multiple data buses, instruction chaining, hardware synchronization, pipelined scattering, matrix density, and distribution of non-zero elements is analyzed.