A 0.35/spl mu/m SiGe BiCMOS frequency synthesizer for WCDMA mobile terminals

A highly integrated frequency synthesizer for WCDMA frequency division duplexing (FDD) mode applications is presented. It consists of three sets of synthesizers, two radio frequency (RF) synthesizers and one intermediate frequency (IF) synthesizer. All three synthesizers have been successfully integrated into one single chip and implemented in TSMC 0.35/spl mu/m SiGe BiCMOS process. The RF synthesizer with external VCO covers from 2300 to 2360 MHz and has -105dBc/Hz at 100kHz offset from the carrier. In the IF synthesizer, a VCO with two external inductors and on-chip varactors in its tank, is integrated with the IF synthesizer. When locked at the IF oscillation frequency of 760 MHz, the measured phase noise of the IF synthesizer is -111 dBc/Hz at 100 kHz offset from the carrier. The maximum settling time is within 200/spl mu/sec, and the reference spur is at least 76dB below the carrier power. The measured current consumption of each set of frequency synthesizers including VCO is 14mA, and measured current consumption of this chip is 42mA.