Pulse waveform dependence on AC bias temperature instability in pMOSFETs

In this letter, the waveform effects on the degradation enhancement of pMOSFETs under high-frequency (/spl ges/10/sup 4/ Hz) bipolar-pulsed bias-temperature (BT) stresses were systematically studied. The enhancement was found to be mainly governed by the fall time (t/sub F/) of the pulse waveform, namely, the transition time of the silicon surface potential from strong accumulation to strong inversion, rather than the pulse rise time (t/sub R/) and the pulse duty factor (D). The enhancement decreases significantly with t/sub F/ increasing, and is almost eliminated when t/sub F/ is larger than /spl sim/60 ns. This new finding is consistent with our newly proposed assumption that the recombination of free holes and trapped electrons at the SiO/sub 2//Si interface and/or near-interface states can enhance the interface trap generation.