Post-CMOS process for high-aspect-ratio monolithically integrated single crystal silicon microstructures

A novel modular fabrication process for bulk integrated single-crystal-silicon microstructures designed and manufactured in a post-CMOS process is presented in this paper, which can increase the accuracy and reliability of MEMS sensors as well as lower the fabricating cost. The process involves the conventional CMOS circuit formation, the electrical isolation trench etching and refilling, backside silicon etching, interconnection formation, and structure releasing. The performance of integrated Schottky diodes was tested to have reverse leakage of 10/sup -7/A, and breakdown voltage of 57V. A new method for fabricating void-free isolation trenches is also developed. The resistance of void-free isolation trench is more than 10/sup 12//spl Omega/. The influence of LPCVD high temperature on the doping distribution is simulated.