SLOP-LDMOS - a novel super-junction concept LDMOS and its experimental demonstration

In this paper, a novel surface low on-resistance path lateral double-diffusion MOSFET (SLOP-LDMOS), based on the super junction (SJ) concept, is presented and experimentally demonstrated for the first time. The key feature of this new structure is that the super junction primarily provides the low on-resistance path and it is just located at the surface of the drift region rather than the entire drift region, which is generally used in super junction devices to improve breakdown characteristics simultaneity. The manufacturing process of the device is relatively simple and is compatible with the Bi-CMOS process. 3D device simulations indicate that the SLOP-LDMOS can provide a specific on-resistance reduction of 50% as compared with the conventional single reduced surface field (RESURF) LDMOS at a given breakdown voltage. An experimental LDMOS exhibited a breakdown voltage of 250 V, and a specific on-resistance of 11.4 /spl Omega/mm/sup 2/. This is an early experimental report of the low on-resistance LDMOS with more than 200 V blocking capability by using the super junction concept.