A novel VDMOSFET structure with reduced gate charge

In this paper, a novel VDMOSFET structure, which realizes the small gate charge without significantly degrading specific on-resistance, is proposed. The new structure features the formation of the maximum removal gate electrode portion incorporating with the additional n-type implanted layer and the p-type implanted layer at the surface of the n-epitaxial layer. Reduction of the gate charge results in an improvement of switching performance. The gate charge density Q/sub Gd/ and the figure of merit (FOM) of the new VDMOSFET are reduced by 62 percent and 56 percent compared with those of the conventional device, respectively.