A 43mW CT complex /spl Delta//spl Sigma/ ADC with 23MHz of signal bandwidth and 68.8dB SNDR

A low-power wide-BW CT complex /spl Delta//spl Sigma/ ADC suitable for a low-IF receiver is fabricated in a 0.18 /spl mu/m CMOS process and consumes 42.6mW from a 1.8V supply. The IC achieves 68.8dB SNDR and a DR of 72.5dB over a 23.0MHz band centered around 11.5MHz.