Method for endurance optimization of the HIMOS/spl trade/ flash memory cell

A negative oxide charge located at the split-point is the main cause of threshold voltage window closure in source side injection flash EEPROM cells under 10/sup 5/ write/erase cycles. We show a slow trapping rate and a temperature dependence of the detrapping rate below 100/spl deg/C. The detrapping rate is not temperature dependent between 100/spl deg/C and 250/spl deg/C. Finally, the split-point charge formation can be significantly reduced by using of a ramped write pulse.