Design and cost evaluation of simple interconnection circuits for multiprocessor systems

The generalized hypercube (GHC) interconnection network is used in the design of a processor for parallel implementation of a 2D-FFT (two-dimensional fast Fourier transform) algorithm. An interface has been designed, up to layout level, capable of signalling transmission errors, utilizing in this way the characteristics of the structure. The design has also allowed the determination of the cost of the network: although the pure hardware cost is higher with respect to other simpler structures; the cost/performance ratio still favours the GHC.<>