A self-aligned ohmic metallization GaAs-Gate FET with integrated coupling diode

A novel processing scheme has been demonstrated for the fabrication of GaAs/AlGaAs semiconductor-insulator-semiconductor FET's (SISFET's). It was shown that a self-aligned ohmic (SAO) metal deposition could be used, without any additional ion implantation, to contact the two-dimensional electron gas (2DEG) of the SISFET. The process incorporates a coupling diode epitaxially grown atop the semiconductor gate (CDFL scheme [1]). Also, a depletion-mode MESFET was fabricated within the GaAs-gate layer in order to demonstrate the feasibility of a SISFET/MESFET inverter.